View BU6521KV_5000699.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

AIE Adaptive Image Enhancer Series
Video Encoders built-in Image Correction
BU6520KV,BU6521KV
No.10060ECT03
Description BU6520KV, BU6521KV are video encoders with built-in AIE image correcting function. Also, BU6521KV has the image correcting function of the fog reduction, too. Fog Reduction, the brightness correction, the backlight correction and the chroma emphasis can improve the visibility of the input image of the camera.
* AIE and Fog Reduction function are image processing technology by ROHM's hardware.
Features 1) Format of video output is compatible with NTSC/PAL composite video format (CVBS). Built-in DAC with direct 75 drive capability. *1 2) Built-in Fog Reduction function , dynamic range correction, edge-emphasizing filter and gamma filter. 3) Input/output data format is compatible with ITU-R BT.656 and YCbCr=4:2:2 with synchronization signal. 4) Compatible with NTSC (27MHz, 28.63636MHz and 19.06993MHz)/ *2 PAL(27MHz, 28.375MHz, 35.46895MHz and 18.9375MHz) . 5) Registers can be set up with a 2-line serial interface. 6) Registers can be automatically set up by reading from external EEPROM, when after resetting or changing mode.
*1 As for the Fog Reduction feature, it loads only BU6521KV. *2 NTSC 19,06993 MHz and PAL 18,9375 MHz support only BU6521KV.
Applications Security camera, camera for automotive, drive recorder etc. Line up matrix Power Sopply Image size Voltage(V) Input Interface Control Interface Output Interface Temperature Operating Range()
Part No.
Feature
Package
2 1.4 to 1.6 I C, 8bit, 8bit, 720x480, Serial (VDDCore) BU6520KV YUV=4:2:2, YUV=4:2:2, 2.7 to 3.6 SD size EEPROM ITU-R BT.656 ITU-R BT.656 (VDDI/O, AVDD) interface
AIE, Video output
-40 ~ +85
VQFP48C
2 1.4 to 1.6 I C, AIE, 8bit, 8bit, 720x480, Serial (VDDCore) Fog reduction, BU6521KV YUV=4:2:2, YUV=4:2:2, SD size 2.7 to 3.6 EEPROM Video output ITU-R BT.656 ITU-R BT.656 (VDDI/O, AVDD) interface
-40 ~ +85
VQFP48C
I2C BUS is a registered trademark of Philips
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
1/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Absolute maximum ratings Parameter Supply voltage1 (IO) Supply voltage2 (IO) Supply voltage3 (DAC) Supply voltage4 (CORE) Input voltage range Storage temperature range Power dissipation
*1 *2 *3 * *
Technical Note
Symbol VDDIO VDDI2C AVDD VDD VIN Tstg PD
Rating -0.3+4.2 -0.3+4.2 -0.3+4.2 -0.3+2.1 -0.3IO_LVL+0.3 -40+125 400 *2, 900 *3
*1
Unit V V V V V mW
IO_LVL is a generic name of VDDIO, VDDI2C, and AVDD. IC only. In the case exceeding 25C, 4.0mW should be reduced at the rating 1C. When packaging a glass epoxy board of 70x70x1.6mm. If exceeding 25C, 9.0mW should be reduced at the rating 1C. Has not been designed to withstand radiation. Operation is not guaranteed at absolute maximum ratings.
Operating conditions Parameter Supply voltage 1 (IO) Supply voltage 2 (IO) Supply voltage 3 (DAC) Supply voltage 4 (CORE) Input voltage range Operating temperature range Symbol VDDIO VDDI2C AVDD VDD VIN Topr Ratings 2.70 ~ 3.60 (Typ.: 3.30) 2.70 ~ 3.60 (Typ.: 3.30) 2.70 ~ 3.60 (Typ.: 3.30) 1.40 ~ 1.60 (Typ.: 1.50) 0.00 ~ IO_LVL -40 ~ +85
*1
Unit V V V V V C
*1 IO_LVL is a generic name of VDDIO, VDDI2C, and AVDD. * Please supply power source in order of VDD(VDDIO, VDDI2C, and AVDD).
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
2/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Block Diagram [BU6520KV]
Technical Note
CAMDI0 CAMDI7
8
AIE
8
CAMDO0 CAMDO7
CAMHSI CAMVSI CAMCKI
Timing Generator
Video Encoder
10bit DAC
VOUT
IREF
Register
CAMHSO CAMVSO CAMCKO
2-line Serial Interface (I2 C)
Serial Interface (SPI)
SDA
SDC
SDI
SDO
SCK
SCEB
WPB
RESETB
TEST
AUTO MODE0 MODE1
Fig.1 BU6520KV Block Diagram [BU6521KV]
CAMDI0 CAMDI7
8
Fog reduction
AIE
8
CAMDO0 CAMDO7
CAMHSI CAMVSI CAMCKI
Timing Generator
Video Encoder
10bit DAC
VOUT
IREF
Register
CAMHSO CAMVSO CAMCKO
2-line Serial Interface (I2 C)
Serial Interface (SPI)
SDA
SDC
SDI
SDO
SCK
SCEB
WPB
RESETB
TEST
AUTO MODE0 MODE1
Fig.2 BU6521KV Block Diagram
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
3/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Pin functional descriptionsEquivalent circuit PIN No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Active Level DATA DATA DATA DATA DATA GND PWR DATA DATA DATA DATA * * CLK GND PWR DATA DATA DATA DATA DATA DATA DATA DATA
Technical Note
PIN Name SDI CAMDI7 CAMDI6 CAMDI5 CAMDI4 GND VDD CAMDI3 CAMDI2 CAMDI1 CAMDI0 CAMHSI CAMVSI CAMCKI GND VDDIO CAMDO0 CAMDO1 CAMDO2 CAMDO3 CAMDO4 CAMDO5 CAMDO6 CAMDO7
In/Out In In In In In In In In In In In In Out Out Out Out Out Out Out Out
Init Low Low Low Low Low Low Low Low
Function explanation SPI-bus data input Data input bit 7 Data input bit 6 Data input bit 5 Data input bit 4 Common GROUND CORE power source Data input bit 3 Data input bit 2 Data input bit 1 Data input bit 0 Horizontal timing input Vertical timing input Clock input Common GROUND Digital IO power source Data output bit 0 Data output bit 1 Data output bit 2 Data output bit 3 Data output bit 4 Data output bit 5 Data output bit 6 Data output bit 7
Power Source System 1 1 1 1 1 1,2,4 4 1 1 1 1 1 1 1 1,2,4 1 1 1 1 1 1 1 1 1
I/O *1 type A C C C C C C C C C C E F F F F F F F F
" * " in the Active Level column indicates that it may be changed during set-up of the register. Init column indicates pin status when released from reset. In the power system column, " 1 " stands for VDDIO, " 2 " stands for VDDI2C, " 3 " stands for AVDD, " 4 " stands for VDD. *1 Fig.3 Equivalent Circuit Structures of input / output pins reference
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
4/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Technical Note
PIN No. 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
PIN Name CAMHSO CAMVSO CAMCKO GND VDD AUTO MODE0 MODE1 VOUT AVSS IREF AVDD GND VDDI2C SDA SDC RESETB TEST GND VDDIO WPB SCEB SCK SDO
In/Out Out Out Out In In In Out Out In/Out In/Out In In Out Out Out Out
Active Level * * CLK GND PWR High DATA DATA Analog GND Analog PWR GND PWR DATA CLK Low High GND PWR Low Low CLK DATA
Init Low Low Low PD PD PD In In PD Low High Low Low
*2 *2 *2 *2
Function explanation Horizontal timing output Vertical timing output Clock output Common GROUND CORE power source Auto register setting enable signal Auto register setting mode select bit 0 Auto register setting mode select bit 1 Analog composite output Analog GROUND for DAC Reference voltage for DAC Analog power source for DAC Common GROUND Digital IO power source (For 2-line serial interface input/output) 2-line serial interface data input/output 2-line serial interface clock input System reset signal Test mode terminal (Connect to GND) Common GROUND Digital IO power source Write protect signal to EEPROM Chip select signal to EEPROM SPI-bus clock SPI-bus data output
Power Source System 1 1 1 1,2,4 4 1 1 1 3 3 3 3 1,2,4 2 2 2 1 1 1,2,4 1 1 1 1 1
I/O *1 type F F F D D D H I G G B D F F F F
" * " in the Active Level column indicates that it may be changed during set-up of the register. Init column indicates pin status when released from reset. In the power system column, " 1 " stands for VDDIO, " 2 " stands for VDDI2C, " 3 " stands for AVDD, " 4 " stands for VDD. *1 Fig.3 Equivalent Circuit Structures of input / output pins reference *2 Pull-down status.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
5/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Technical Note
Type
Equivalent circuit configuration
VDDIO VDDIO
Typ
Equivalent circuit configuration
VDDIO To internal circuit
A
To internal circuit
B
GND
Input terminal
GND
GND
Input terminal with hysteresis
Internal signal
Internal signal VDDIO
VDDIO VDDIO VDDIO
C
To internal circuit
D
To internal circuit
GND
GND
GND
GND
GND
Input terminal with suspend
VDDIO
Input terminal with pull down
VDDIO VDDIO
To internal circuit Internal signal
E
Internal signal GND
F
GND
GND
Input terminal with hysteresis and suspend
VDDI2C To internal circuit GND VDDI2C Internal signal
Output terminal
AVDD AVDD
VDDI2C
Internal signal Internal signal
G
Internal signal
H
GND
GND
Internal signal
Input/Output terminal
AVDD AVDD Internal signal Internal signal
VOUT
AVSS
I
Internal signal AVSS To internal circuit
IREF Fig.3 Equivalent Circuit Structures of input / output pins
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
6/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Pin configrations RESETB VDDI2C VDDIO SCEB TEST WPB GND SDO SDC SCK SDA GND
Technical Note
48 SDI CAMDI7 CAMDI6 CAMDI5 CAMDI4 GND VDD CAMDI3 CAMDI2 CAMDI1 CAMDI0 CAMHSI 1 2 3 4 5 6 7 8 9 10 11 12 13 CAMVSI
47
46
45
44
43
42
41
40
39
38
37 36 35 34 33 32 AVDD IREF AVSS VOUT MODE1 MODE0 AUTO VDD GND CAMCKO CAMVSO CAMHSO
VQFP48C
31 30 29 28 27 26 25
14 CAMCKI
15
16 VDDIO
17 CAMDO0
18 CAMDO1
19 CAMDO2
20 CAMDO3
21 CAMDO4
22 CAMDO5
23 CAMDO6
24 CAMDO7
GND
Fig.4 Pin configrations
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
7/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Electrical characteristics(common)
Technical Note
(Unless otherwise specified VDD=1.50V, VDDIO=3.3V, VDDI2C=3.3V, AVDD=3.3V, GND=0.0V, Ta=25,fIN=35.5MHz) Limits Parameter Symbol Unit Condition MIN. TYP. MAX. Input frequency Supply current (CORE) BU6520KV BU6521KV fIN IDD1 IDD1 IDDst1 IDD2 IDD2 IDDst2 2 30 40 38 38 35.5 62 50 56 5 MHz CAMCKI(DUTY45%55%) mA mA A mA mA A 35.5MHz operational setting*1 35.5MHz operational setting*2 At sleep mode setting, input terminal = GND setting RL=37.5, RIREF=2.4k RL=37.5, RIREF=2.4k input terminal=GND and DAC power down mode setting
Leakage current (CORE) Supply current (DAC) BU6520KV BU6521KV
Leakage current (DAC)
*1 *2
Supply current(Total value of current of VDD, VDDIO, and VDDI2C) at color-bar image input in AIE enable and Digital output disable settings. Supply current(VDD) at color-bar image input in Fog-Reduction enable, AIE enable and Digital output disable settings.
Electrical characteristics(DC characteristics) 1. DC characteristics (IO) (Unless otherwise specified VDD=1.50V, VDDIO=3.3V, VDDI2C=3.3V, AVDD=3.3V, GND=0.0V, Ta=25) Limits Parameter Symbol Unit Condition MIN. TYP. MAX. Input "H" current Input "L" current Pull-down current Input "H" voltage 1 Input "L" voltage 1 Input "H" voltage 2 Input "L" voltage 2 Output "H" voltage Output "L" voltage
*
IIH IIL IPD VIH1 VIL1 VIH2 VIL2 VOH VOL
-10 -10 25 IO_LVL x0.8 -0.3 IO_LVL x0.85 -0.3 IO_LVL -0.4 0.0
50 -
10 10 100 IO_LVL +0.3 IO_LVL x0.2 IO_LVL +0.3 IO_LVL x0.15 IO_LVL 0.4
A A A V V V V V V
VIH=IO_LVL VIL=GND VIH=IO_LVL Normal input (Including input mode of I/O terminal) Normal input (Including input mode of I/O terminal) Hysteresis input (RESETB,CAMCKI,AUTO,MODE0,MODE1) Hysteresis input (RESETB,CAMCKI,AUTO,MODE0,MODE1) IOH=-1.0mA(DC) (including output mode of I/O terminal) IOL=1.0mA(DC) (including output mode of I/O terminal)
IO_LVL is a generic name of VDDIO, VDDI2C and AVDD.
2. DC characteristics (DAC) (Unless otherwise specified VDD=1.50V, VDDIO=3.3V, VDDI2C=3.3V, AVDD=3.3V, GND=0.0V, Ta=25) Limits Parameter Symbol Unit Condition MIN. TYP. MAX. RL=37.5, RIREF=2.4k, Integral Non-linearity INL 4.0 8.0 LSB DAC resolution=10bit RL=37.5, RIREF=2.4k, 1.0 2.0 Differential Non-linearity DNL LSB DAC resolution=10bit RL=37.5, RIREF=2.4k, Output Voltage (full scale) VFS 1.1 1.25 1.4 V DAC resolution=10bit
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
8/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Electrical characteristics(AC characteristics) 1. Data Input Interface Timing
Technical Note
CAMVSI CAMHSI CAMDI0 CAMDI7 CAMCKI (CKPOL="0") CAMCKI (CKPOL="1")
tCMS
tCMH
Fig.5 Data Input Interface Timing Symbol tCAMCKI dCAMCKI tCMS tCMH
*
Description CAMCKI Clock Cycle CAMCKI Clock Duty CAMCKI Rise / Fall Camera Setup Time CAMCKI Rise / Fall Camera Hold Time BU6520KV BU6521KV
MIN 27.8 45 8 6 5
TYP 50 -
MAX 55 -
Unit ns % ns ns ns
CKPOL selects the CAMCKI polarity. (CKPOL is register at BU6520KV/BU6521KV)
2. Data Output Interface Timing
tPCLK CAMCKO (CKPOL="1") CAMVSO CAMHSO CAMDO0 CAMDO7
tPHH tPDV
tPHL
Fig.6 Data Output Interface Timing Symbol tPCLK dPCLK tPDV tPHL, tPHH
*
Description CAMCKO Clock Cycle CAMCKO Clock Duty Decision of CAMDO from CAMCKO Decision of CAMVSO or CAMHSO from CAMCKO
MIN 27.8 40 -
TYP 50 -
MAX 60 7 7
Unit ns % ns ns
This figure shows CKPOL setting is " 1 " In case of CKPOL= " 0 ", CAMVSO, CAMHSO and CAMDO0-CAMCO7 change based on CAMCKO fall edge.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
9/18
2010.02 - Rev.C
BU6520KV,BU6521KV
3. 2-line Serial Interface Timing
Technical Note
SDA
t SU;DAT
t LOW
t HD;ST
t BUF
SDC
t HD;STA t HD;DAT t HIGH
t SU;STA
t SU;STO
Fig.7 2-line Serial Interface Timing Symbol fSCL tHD;STA fLOW tHIGH tSU;STA tHD;DAT tSU;DAT tSU;STO tBUF SDC Clock Frequency Hold Time (repetition) "START" conditions. The first clock pulse is generated after this period. The "L" period of SDC clock The "H" period of SDC clock Setup Time of repetitive "START" conditions Data Hold Time Data Setup Time Setup Time of the "STOP" conditions Bus free Time between "STOP" conditions and the "START" conditions Description MIN 0 0.6 1.3 0.6 0.6 0 100 0.6 1.3 TYP MAX 400 Unit kHz s s s s s ns s s
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
10/18
2010.02 - Rev.C
BU6520KV,BU6521KV
4. SPI-bus Interface Timing
SPCS SPDV SPCH
Technical Note
SCK
SCEB
SDO
SDI
SPS
SPH
Fig.8 SPI-bus Interface Timing Symbol tSPCLK dSPCLK tSPCS tSPCH tSPDV tSPS tSPH
*1
Description Clock Cycle Clock Duty SCK Rise SCEB Setup Time SCEB Rise after SCK Rise Time Decision of SDO from SCK Fall SCK Rise SDI Setup Time SCK Rise SDI Hold Time
MIN 2 45 4 2 -
TYP 736*1 50 738 *1 1105 751*1 -
MAX 8192 55 12289 8319 28 28 28
Unit tCAMCKI % tCAMCKI tCAMCKI ns ns ns
Default status right after reset
When the automatic reading function with the AUTO pin is used, it becomes timing of SCEB to SCK as above. It is possible to access from the register of BU6520KV/BU6521KV to EEPROM.In that case, SCEB is controlled by the register. After the value is set to the register, the SCEB pin is changed into the logic set at once.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
11/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Functional descriptions 1. Analog Composite Output Waveform 1.1. Output waveform in NTSC
Technical Note
130.8 IRE 100.0 IRE
130.8 IRE
116.4 IRE
100.3 IRE
93.6 IRE
59.4 IRE
VOUT
48.1 IRE 0.0 IRE 13.9 IRE 7.5 IRE 7.2 IRE -8.9 IRE -40.0 IRE White Yellow Cyan Green Magenta
40.0 IRE
-23.3 IRE Red
-23.3 IRE Blue Black
Fig.9 Color-bar corrugation in NTSC setting 1.2. Output waveform in PAL
133.3 IRE 100.0 IRE
133.3 IRE
117.7 IRE
100.3 IRE
93.2 IRE
56.1 IRE
VOUT
43.9 IRE 0.0 IRE 6.9 IRE 0.0 IRE -0.3 IRE
42.9 IRE
-17.7 IRE
-43.0 IRE White Yellow Cyan Green Magenta
-33.3 IRE Red
-33.3 IRE Blue Black
Fig.10 Color-bar corrugation in PAL setting
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
12/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Technical Note
2. The 2 line formula serial interface format Slave address is 70h. The sub-address is incremented automatically when accessing it (read / write) continuously 2 times or more.
SDI SDA
SDC SCLK
S
1-7
8 R/W
9 ACK
1-7
8
9 ACK
1-7 Data
8
9 ACK
P STOP condition
START Slave condition address
Sub address
Fig.11 Fig.10 Waveform of date transmission part
Write sequence
S
Slave address (70h)
W A(S) (0)
Sub address
A(S)
Data
A(S)
Data
A(S)
Data
A(S)/ NA(S)
P
Read sequence
S
Slave address (70h)
W A(S) (0)
Sub address
A(S)
S
Slave address (70h)
R A(S) (1)
Data
A(M)
Data
A(M)/ NA(M)
P
S = START condition P = STOP condition
A(S) = Acknowledge by slave A(M) = Acknowledge by master
NA(S) = Not acknowledge by slave NA(M) = Not acknowledge by master
Fig.12 2-line serial interface format 3. SPI-bus format
WPB SCEB SCK SDO SDI
H'/'L' level is set by the REG_WPB register. H'/'L' level is set by the REG_SCEB register.
W7 R7
W6 R6
W5 R5
W4 R4
W3 R3
W2 R2
W1 R1
W0 R0
The data written in the SWDATA register is set.
It is possible to read it from the SRDATA register.
Fig.13 SPI-bus interface wave form
* REG_WPB, REG_SCEB, SWDATA, and SRDATA in figure are the register names, and the each function is as follows. REG_WPB Set WP Terminal logic. Register value is output directly. REG_SCEB Set SCEB Terminal logic. Register value is output directly. SWDATA[7:0]Write data to EEPROM. Transfers MSB the first. SRDATA[7:0] Read data from EEPROM. Converts MSB the first.
The SCK clock frequency is as follows. (SPIPREDIV+1) / (SPIDIV+1) SCK frequency = CAMCKI frequency / 2 Register range : SPIPREDIV = 0 to 7, SPIDIV = 0 to 31 When CAMCKI is 27MHz, SCK becomes 3.3 kHz from 13.5 MHz.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
13/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Application example
Technical Note
2
BU6520KV/BU6521KV
8 8 CAMDI0 -CAMDI7 CAMHSI CAMVSI CAMCKI CAMDO0 -CAMDO7 CAMHSO CAMVSO CAMCKO R1 : 2.4k IREF
Camera Module
Image Processor
I2C Controller
SDA SDC VOUT LPF R2 : 75
EEPROM
WPB SCEB SCK SDO SDI VDD
C1,C2 : 0.1uF VDDIO
*1
Switch
AUTO MODE0 MODE1 VDDI2C GND RESETB AVDD
C3,C4 : 0.1uF
*2
C5 : 0.1uF
*3
Reset Controller
C6 : 0.1uF TEST AVSS
*4
*1 *2 *3 *4
Please arrange a capacitor each near two VDD pin. Please arrange a capacitor each near two VDDIO pin. Please arrange a capacitor near VDDI2C pin. Please arrange a capacitor near AVDD pin.
Fig.14 Application example 1 Fig.14 is a reference example when the system is connected, and the operation is not guaranteed.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
14/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Technical Note
2
BU6520KV/BU6521KV
8 8 CAMDI0 -CAMDI7 CAMHSI CAMVSI CAMCKI CAMDO0 -CAMDO7 CAMHSO CAMVSO CAMCKO R1 : 2.4k IREF
Camera Module
Image Processor
I2C Controller
SDA SDC VOUT WPB SCEB SCK SDO SDI VDD C1,C2 : 0.1uF AUTO MODE0 MODE1 VDDIO C3,C4 : 0.1uF VDDI2C C5 : 0.1uF RESETB GND AVDD TEST C6 : 0.1uF AVSS
*4 *3 *2 *1
LPF R2 : 75
OPEN
Reset Controller
*1 *2 *3 *4
Please arrange a capacitor each near two VDD pin. Please arrange a capacitor each near two VDDIO pin. Please arrange a capacitor near VDDI2C pin. Please arrange a capacitor near AVDD pin.
Fig.15 Application example 2 Fig.15 is a reference example when the system is connected, and the operation is not guaranteed.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
15/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Technical Note

BU6520KV/BU6521KV
8 8 CAMDI0 -CAMDI7 CAMHSI CAMVSI CAMCKI CAMDO0 -CAMDO7 CAMHSO CAMVSO CAMCKO R1 : 2.4k IREF SDA SDC VOUT LPF R2 : 75
Camera Module
Image Processor
EEPROM
WPB SCEB SCK SDO SDI VDD
C1,C2 : 0.1uF
*1
Switch
AUTO MODE0 MODE1
VDDIO C3,C4 : 0.1uF VDDI2C
*2
Reset Controller
C5 : 0.1uF RESETB GND AVDD TEST C6 : 0.1uF AVSS
*3
*4
*1 *2 *3 *4
Please arrange a capacitor each near two VDD pin. Please arrange a capacitor each near two VDDIO pin. Please arrange a capacitor near VDDI2C pin. Please arrange a capacitor near AVDD pin.
Fig.16 Application example 3 Fig.16 is a reference example when the system is connected, and the operation is not guaranteed.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
16/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Technical Note
Note for use (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC's power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, for the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals} In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (12) Rush current For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays. Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of wiring.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
17/18
2010.02 - Rev.C
BU6520KV,BU6521KV
Ordering part number
Technical Note
B
U
6
Part No. 6520 6521
5
2
0
K
V
-
E
2
Part No.
Package KV:VQFP48C
Packaging and forming specification E2: Embossed tape and reel
VQFP48C
9.0 0.2 7.0 0.1
36 37 25 24

Tape Quantity Embossed carrier tape 1500pcs E2
direction the at left when you ( The on the leftishand1pin of product is thethe upperthe right hand hold ) reel and you pull out tape on
9.00.2
7.00.1
48 1 12
13
0.75
1PIN MARK
+0.05 0.145 -0.03
1.6MAX
4 +6 -4
1.40.05
0.10.05
0.5 0.1
0.08 S +0.05 0.22 -0.04 0.08
0.50.15
1.00.2
0.75
Direction of feed
M
1pin (Unit : mm) Reel
Direction of feed
Order quantity needs to be multiple of the minimum quantity.
www.rohm.com (c) 2010 ROHM Co., Ltd. All rights reserved.
18/18
2010.02 - Rev.C
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
R0039A

▲Up To Search▲

Price & Availability of BU6521KV

	To Download BU6521KV Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .